The present invention is directed to a three dimensional integrated circuit (IC) interconnect module by providing a fully interconnected module with a plurality of chips. One or more chips are mounted on a separate slice, each slice is individually tested, and the slices are assembled by stacking them one on top of another. This module approach will produce a low cost, moderate performance package which will hold an entire chip set and may have a standard pin grid array (PGA) or quad flat pack footprint for mounting on a printed circuit board.
The method of manufacturing allows each component to be tested individually after mounting and prior to assembly. It provides for the interconnect leads to be accessible for testing and provides an assembly check test method for testing during the manufacturing process. The manufacturing process should provide an extremely high yield module, and the finished module allows testing using traditional approaches.